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Transactions: WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS
Transactions ID Number: 53-402
Full Name: Ahmed Ben Atitallah
Position: Associate Professor
Age: ON
Sex: Male
Address: ISECS, BP868
Country: TUNISIA
Tel: 0021627566567
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E-mail address: ahmed.benatitallah@isecs.rnu.tn
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Title of the Paper: Advanced Design of TQ/IQT Component for H.264/AVC Based on SoPC Validation
Authors as they appear in the Paper: Ahmed Ben Atitallah, Hassen Loukil, Patrice Kadionik, Nouri Masmoudi
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Number of paper pages: 13
Abstract: This paper presents an advanced hardware architecture for integer transform, quantization, inverse quantization and inverse integer transform modules dedicated to the macroblock engine of the H.264/AVC video codec standard. Our highly parallel and pipelined architecture is designed to be used for intra and inter prediction modes in H.264/AVC. The TQ/IQT design is described in VHDL language and synthesized to Altera Stratix II FPGA and to TSMC 0.18µm standard-cells. The throughput of the hardware architecture reaches a processing rate up to 1070 millions of pixels per second at 171.4 MHz when mapped to standard-cells. In addition, a system on a programmable chip (SoPC) implementation and validation of the proposed design as an IP core is presented using the embedded Altera development board.
Keywords: H.264/AVC, Video Coding, FPGA, SoPC.
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