The following information was submitted:
Transactions: WSEAS TRANSACTIONS ON COMPUTERS
Transactions ID Number: 31-756
Full Name: Trong-Yen Lee
Position: Associate Professor
Age: ON
Sex: Male
Address: NTUT Box 2251, No. 1, Sec. 3, Chung-Hsiao E. Rd., Taipei, Taiwan R.O.C.
Country: TAIWAN
Tel: +886-2-2771-2171 ext. 2251
Tel prefix:
Fax: +886-2-2731-7120
E-mail address: tylee@ntut.edu.tw
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Title of the Paper: Adaptive Multi-Constraints in Hardware-Software Partitioning for Embedded Multiprocessor FPGA Systems
Authors as they appear in the Paper: Trong-Yen Lee,Yang-Hsin Fan,Chia-Chun Tsai
Email addresses of all the authors: tylee@ntut.edu.tw,yhfan@nttu.edu.tw,chun@mail.nhu.edu.tw
Number of paper pages: 10
Abstract: An embedded multiprocessor field programmable gate array (FPGA) system has a powerful and flexible architecture that the interaction between hardware circuits and software applications. Modern electronic products, such as portable devices, consumer electronics and telematics, can be evaluated rapidly in this platform via the implementation of a set of hardware and software tasks. However, the functionality is markedly increased, resulting in a significant raise in the number of hardware and software tasks. Consequently, too large of a solution space is formed to achieve hardware-software partitioning. Moreover, a partitioning result with low power consumption and fast execution time is difficult to obtain since meeting simultaneously multi-constraints from hundreds of thousands of combinations of hardware-software partitions is difficult. Thus, this work presents a hardware-software partitioning scheme that can obtain a partitioning result that satisfies multi-cons!
traints from massive solution space. Specifically, this study attains a partitioning result with low power consumption and fast execution time. The effectiveness of the proposed approach is demonstrated by assessing a JPEG encoding system and a benchmark with 199 tasks.
Keywords: Adaptive multi-constraints partitioning, Hardware-software Partitioning, Embedded Multiprocessor System, FPGA system, Hardware-software codesign
EXTENSION of the file: .pdf
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How Did you learn about congress: Trong-Yen Lee, NTUT Box 2251, No. 1, Sec. 3, Chung-Hsiao E. Rd., Taipei, Taiwan R.O.C., tylee@ntut.edu.tw
IP ADDRESS: 140.124.70.95
