The following information was submitted:
Transactions: WSEAS TRANSACTIONS ON COMPUTERS
Transactions ID Number: 52-534
Full Name: Sun-Yen Tan
Position: Lecturer
Age: ON
Sex: Male
Address: No.1 Sec., Chung-Hsiao E. Road, Taipei City 106, Taiwan
Country: TAIWAN
Tel: +886-938569815
Tel prefix:
Fax: +886-2-27317120
E-mail address: sytan@ntut.edu.tw
Other E-mails: tansy@en.ntut.edu.tw
Title of the Paper: An optimization for the design of a simple asynchronous processor
Authors as they appear in the Paper: Sun-Yen Tan, Wen-Tzeng Huang
Email addresses of all the authors: sytan@ntut.edu.tw, wthuang@must.edu.tw
Number of paper pages: 12
Abstract: The asynchronous circuit style is based on micropipelines, a style used to develop asynchronous microprocessors at Manchester University. This paper has presented some engineering work on developing a micropipeline Stump processor. The work presented in this paper demonstrates that VHDL can be used to describe the behaviour of micropipelined systems. It also shows a comparison of 2-phase and 4-phase implementations in transistor count, speed, and energy. Though the nature of the work is mainly engineering, there are some significant new insights gained in the course of the work. The 2-phase circuits have good performance in speed. This is due to the rising and falling transitions of the 4-phase circuits following the same routes. Asymmetric delays with fast reset circuit can be applied to improve the performance. The fastest speed is 1.55 MIPS for the two-phase synthesized processor and the lowest power consumption is 362.33 fj for the synthesized four-phase long h!
old processor.
Keywords: Asynchronous design, Micropipelines, Processor, VHDL, Synthesis
EXTENSION of the file: .doc
Special (Invited) Session:
Organizer of the Session:
How Did you learn about congress: Microprocessors and microcomputers
IP ADDRESS: 140.124.70.5
