The following information was submitted:
Transactions: WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS
Transactions ID Number: 53-876
Full Name: Rajeev Kumar Chauhan
Position: Associate Professor
Age: ON
Sex: Male
Address: Department of ECE, MMMEC-Gorakhpur (INDIA)
Country: INDIA
Tel: 91-9235500556
Tel prefix:
Fax:
E-mail address: rkchauhan27@gmail.com
Other E-mails: rkchauhan27@rediffmail.com
Title of the Paper: A Novel Technique to Reduce Write Delay of SRAM Architectures
Authors as they appear in the Paper: swapnil vats and r.k. chauhan
Email addresses of all the authors: rkchauhan27@gmail.com and swapnilvats@yahoo.com
Number of paper pages: 10
Abstract: This paper presents a novel circuit technique for improving the write delay of an SRAM cell. The technique is common for all the SRAM architecture. It utilizes a PMOS between power supply rail and the SRAM cell and an NMOS between SRAM cell and ground. The simulation results for write delay, SNM and power dissipation were presented with and without application of proposed technique on two different SRAM architectures. Significant write delay improvements and power dissipation were noticed for the proposed modified SRAM architecture with less impact on SNM.
Keywords: SRAM, SNM, NMOS, PMOS, DRAM, Butterfly curve
EXTENSION of the file: .pdf
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Organizer of the Session:
How Did you learn about congress: Microelectronics, Microcircuits, Digital Circuits, CAD Tools, Circuits and Electronics for Data Conversion
IP ADDRESS: 210.212.51.4
