Saturday 31 October 2009

Wseas Transactions

New Subscription to Wseas Transactions

The following information was submitted:

Transactions: WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS
Transactions ID Number: 29-849
Full Name: Rubén Martínez Alonso
Position: Doctor (Researcher)
Age: ON
Sex: Male
Address: Av. Tecnológico 1500, Col. Lomas de Santiaguito, Morelia Michoacán
Country: MEXICO
Tel: 014433121110
Tel prefix:
Fax:
E-mail address: rmatalo@hotmail.com
Other E-mails:
Title of the Paper: Parallel Architecture for the Solution of Linear Equations Systems Based on Division Free Gaussian Elimination Method Implemented in FPGA
Authors as they appear in the Paper: R. Martínez, D. Torres, M. Madrigal, S. Maximov
Email addresses of all the authors: rmatalo@hotmail.com,domingotorres@hotmail.com,ruben.martinez08@cfe.gob.mx,rmaalo@mexico.com
Number of paper pages: 11
Abstract: This paper presents a parallel architecture for the solution of linear equations systems based on the Division Free Gaussian Elimination Method. This architecture was implemented in a Field Programmable Gate Array (FPGA). The division-free Gaussian elimination method was integrated in identical processors in a FPGA Spartan 3 of Xilinx. A top-down design was used. The proposed architecture can handle IEEE 754 single and double precision floating-point data and the architecture was implemented in 240 processors. Also, an algorithmic complexity of O(n2) was obtained using a n2 processors scheme that perform the solution of the linear equations. Moreover, the parallel division-free Gaussian elimination method, the architecture´s data distribution and the internal processor-element (PE) architecture are presented. Finally, this paper presents the obtained simulation results and synthesis of the modules designed in very high-speed integrated circuit hardware description !
language (VHDL) using 40 and 100 Mhz frequencies.
Keywords: Field Programmable Gate Array (FPGA), Parallel Processing, Parallel Architectures, linear systems equations, Division Free Gaussian elimination Method.
EXTENSION of the file: .pdf
Special (Invited) Session: Parallel Processors Architecture in FPGA for the Solution of Linear Equations Systems
Organizer of the Session: 626-220
How Did you learn about congress:
IP ADDRESS: 189.180.111.95