The following information was submitted:
Transactions: WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS
Transactions ID Number: 32-589
Full Name: Ramesh Pushpangadan
Position: Assistant Professor
Age: ON
Sex: Male
Address: PB NO 45 , County Hills , College of rngineering munnar, Idukki,kerala
Country: INDIA
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E-mail address: ramp1718009@gmail.com
Other E-mails: rap@cemunnar.org
Title of the Paper: 54x54 BOOTH ENCODED WALLACE TREE MULTIPLIER
Authors as they appear in the Paper: Ramesh P
Email addresses of all the authors: ramp1718009@gmail.com
Number of paper pages: 23
Abstract: In the modern electronic era, multiplier is used in various systems ranging from a simple calculator to complex control system and plays an important role in digital and analog systems. The performance of many computational problems is often influenced by the speed at which a multiplication can be executed. That is multiplication is a bottleneck in speed of many computational devices. Therefore it has become a necessity to design fast multipliers. We can increase the multiplication speed by introducing fast adders using the property of parallelism. But the main problem coming across while introducing this is the increase of Silicon area. Hence while designing a multiplier these facts must be kept in mind. Here the coding is done using the hardware description language VHDL. Simulations are done with the help of ModelSim XE II 5.7g and the synthesis is done using Xilinx ISE 6.
Keywords: multiplier, Booth encoding, Modified Booth Encoding (MBE), Wallace tree, Partial product
EXTENSION of the file: .doc
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