Tuesday, 15 September 2009

Wseas Transactions

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Transactions: WSEAS TRANSACTIONS ON ELECTRONICS
Transactions ID Number: 32-778
Full Name: Mirella Amelia Mioc
Position: Assistant Professor
Age: ON
Sex: Female
Address: 1st Delfinului Street, Timisoara
Country: ROMANIA
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E-mail address: mmioc@yahoo.com
Other E-mails: mmioc@cs.upt.ro
Title of the Paper: Forms, solutions and effects regarding pattern resistant logic
Authors as they appear in the Paper: Mirella Amelia Mioc
Email addresses of all the authors: mmioc@yahoo.com
Number of paper pages: 10
Abstract: Built-in self-tests are the heart of any modern reliability tests. Their applications are ranging from cryptography and bit-error-rate measurements, to wireless communication systems employing spread spectrum or code division multiple access techniques. However the strict time constraints limit the complexity of the tests as such, that multiple compression methods via a parallel LFSR (Linear Feedback Shift Register) signature analyzer exist. This paper's purpose is to raise awareness of the issue to propose a common framework for the identification of pattern resistant logic as well as a means to ensure a more stable and safe fault tolerance using a ROM (Read Only Memory) memory as a look-up table. The alternative proposed method for implementing BIST (Built In Self Test) avoids the use of advanced compression algorithms and needs very little hardware overhead so having small cost and die size.
Keywords: Linear Feedback Shift Register, Built In Self Test, Random Pattern Resistant, Pattern Resistant Logic, Level-Sensitive Scan Design, Digital Signature, Cryptosystem, Very High Speed Integrated Circuit Hardware Description Language, Multiple-Input Signature Register, Look-Up Table.
EXTENSION of the file: .doc
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