The following information was submitted:
Transactions: WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS
Transactions ID Number: 89-580
Full Name: Sun-Yen Tan
Position: Lecturer
Age: ON
Sex: Male
Address: No.1 Sec., Chung-Hsiao E. Road, Taipei City 106, Taiwan
Country: TAIWAN
Tel: +886-938569815
Tel prefix:
Fax: +886-2-27317120
E-mail address: sytan@ntut.edu.tw
Other E-mails: tansy@en.ntut.edu.tw
Title of the Paper: A VHDL-based design methodology for asynchronous circuits
Authors as they appear in the Paper: Sun-Yen Tan, Wen-Tzeng Huang
Email addresses of all the authors: sytan@ntut.edu.tw, wthuang@must.edu.tw
Number of paper pages: 10
Abstract: The asynchronous circuit style is based on micropipelines, a style used to develop asynchronous microprocessors at Manchester University. This paper has presented some engineering work on developing a micropipeline blocksorter. The work presented in this paper demonstrates that VHDL can be used to describe the behaviour of micropipelined systems. It also shows a comparison of 2-phase and 4-phase implementations in transistor count, speed, and energy. Though the nature of the work is mainly engineering, there are some significant new insights gained in the course of the work. In summary, a design environment for asynchronous circuits has been established based upon the micropipeline style and VHDL, a standard hardware description language.
Keywords: Asynchronous design, Micropipelines, Blocksorter, VHDL, Synthesis
EXTENSION of the file: .doc
Special (Invited) Session: The Design of an Asynchronous Blocksorter
Organizer of the Session: 643-374
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