The following information was submitted:
Transactions: WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS
Transactions ID Number: 27-743
Full Name: Minoru Watanabe
Position: Associate Professor
Age: ON
Sex: Male
Address: 3-5-1 Johoku, Hamamatsu, Shizuoka 432-8561
Country: JAPAN
Tel: +81-53-478-1096
Tel prefix:
Fax: +81-53-478-1096
E-mail address: tmwatan@ipc.shizuoka.ac.jp
Other E-mails: tmwatan@ipc.shizuoka.ac.jp
Title of the Paper: An inversion/non-inversion dynamic optically reconfigurable gate array VLSI
Authors as they appear in the Paper: Minoru Watanabe, Mao Nakajima, and Shinichi Kato
Email addresses of all the authors: tmwatan@ipc.shizuoka.ac.jp
Number of paper pages: 10
Abstract: Up to now, an optically differential reconfigurable gate array taking a differential reconfiguration strategy and a dynamic optically reconfigurable gate array taking a photodiode memory architecture have been proposed. The differential reconfiguration strategy provides a higher reconfiguration frequency, with no increase in laser power, than other optically reconfigurable gate arrays, however the differential reconfiguration strategy can not achieve a high-gate-count VLSI because of the area occupied by the static configuration memory. On the other hand, the photodiode memory architecture can achieve a high-gate-count VLSI, but its configuration is slower than that of the optically differential reconfigurable gate array using equivalent laser power. So, this paper presents a novel inversion/non-inversion dynamic optically reconfigurable gate array VLSI that combines both architectures. It thereby achieves both advantages of rapid configuration and a high gate coun!
t. The experiments undertaken in this study clarify the effectiveness of the inversion/non-inversion optical configuration method.
Keywords: FPGAs, PLDs, ORGAs, Dynamic reconfigurations, Optical reconfigurations
EXTENSION of the file: .pdf
Special (Invited) Session: Inversion/non-inversion dynamic optically reconfigurable gate array
Organizer of the Session: 591-745
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