The following information was submitted:
Transactions: WSEAS TRANSACTIONS ON COMPUTERS
Transactions ID Number: 88-370
Full Name: Jareer Abdel-Qader
Position: Doctor (Researcher)
Age: ON
Sex: Male
Address: 416 Yates St. Nedderman Hall, Rm 300, Arlington, Texas
Country: UNITED STATES
Tel: 817-272-3640
Tel prefix:
Fax: 817-272-3784
E-mail address: jareer.abdelqader@mavs.uta.edu
Other E-mails: roger.walker@uta.edu
Title of the Paper: Design and Implementation of Real-Time EP80579 Based Embedded
Authors as they appear in the Paper: Jareer Abdel-Qader, Roger Walker
Email addresses of all the authors: jareer.abdelqader@mavs.uta.edu, roger.walker@uta.edu
Number of paper pages: 10
Abstract: With the advances in integration of different units such as I/O controllers and network interfaces in a single chip, Intel introduced the low power EP80579 embedded processor. This processor is the first IA based system-on-chip (SoC) with an IA-32 processor core, North and South Bridges, and integrated Accelerator and network interface. In this paper we will show main steps to design a real-time embedded system along with identifying the hardware and software requirements to implement such system. The embedded system introduced in this work will perform several tasks regarding road surface conditions based on multiple sensor readings. The sensor data will be processed in real-time to reconstruct the road profile and provide an estimate for the texture contents of the road surface. The EP80579 SoC will be used in the design of such a system. Modeling will be done with the aid of UML profile for modeling and analysis of real-time and embedded (MARTE) systems.
Keywords: System-on-a-chip; Modeling Real-time systems; parallel processing modeling; MARTE; Embedded Application; Road Profiler
EXTENSION of the file: .pdf
Special (Invited) Session: Modeling Real-Time Tolapai Based Embedded System using MARTE
Organizer of the Session: 646-412
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