The following information was submitted:
Transactions: WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS
Transactions ID Number: 52-326
Full Name: K Hariharan
Position: Assistant Professor
Age: ON
Sex: Male
Address: ECE Dept,Thiagarajar college Of Engineering
Country: INDIA
Tel: 09942584251
Tel prefix:
Fax:
E-mail address: khh@tce.edu
Other E-mails: harii07@gmail.com
Title of the Paper: A Time Tick Based Method for Measuring Static Errors of ADC
Authors as they appear in the Paper: K.Hariharan*, R.K.M.Rajkumar, Dr.V.Abhaikumar
Email addresses of all the authors: *khh@tce.edu
Number of paper pages: 10
Abstract: This paper presents a novel Time Tick based Built In Self Test (TT BIST) for measuring the static errors of an Analog to Digital Converter (ADC). The proposed method determines the period elapsed during transition between two consecutive digital levels based on a time-tick count value and compares it with the ideal period of transition. A counter that works, at higher speed relative to the sampling rate of the ADC under test, is used. It counts the number of time ticks occurred during every transition. The required ramp signal is generated dynamically, using current source with digital switch for selecting the equivalent test signal. Further to support testing of errors in ratio metric ADC, a slope conditioning module is also implemented. The entire computation cycle is done in a single ramp cycle whereas in conventional histogram method multiple waveforms are required. Thus, the proposed TT method requires less time to achieve desired accuracy levels by choosing !
the appropriate slope of the ramp signal.
Keywords: DNL, INL, ADC static errors, TTBIST, time-ticks, exploitation module, current source
EXTENSION of the file: .doc
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