Monday, 25 January 2010

Wseas Transactions

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Transactions: WSEAS TRANSACTIONS ON ELECTRONICS
Transactions ID Number: 42-327
Full Name: Ragini Kanchimi reddy
Position: Ph.D. Candidate
Age: ON
Sex: Female
Address: K.Ragini , Flat no:102, Ravi Teja Complex, Amba Gardens,Mehdipatnam,Hyderabad-28
Country: INDIA
Tel: 91-9849627161
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E-mail address: ragini_kanchimi@yahoo.co.in
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Title of the Paper: variable threshold mos circuits
Authors as they appear in the Paper: Ragini. K 1a* , Dr. Satyam. M2b , Dr. Jinaga.B.C 3c
Email addresses of all the authors: E-mail address :ragini_kanchimi@yahoo.co.in, b,E-mail address: Satyam@iiit.ac.in,c.E-mail address:jinagabc@gmail.com
Number of paper pages: 14
Abstract: ABSTRACT Dynamic threshold MOS (DTMOS) circuits provide low leakage and high current drive, compared to CMOS circuits, operated at lower voltages. This paper proposes a modified DTMOS approach, called Variable threshold MOS (VTMOS) approach. The VTMOS is based on operating the MOS devices with an appropriate substrate bias which varies with gate voltage, by connecting a positive bias voltage between gate and substrate for NMOS and negative bias voltage between gate and substrate for PMOS. With VTMOS, there is a considerable reduction in operating current and power dissipation, while the remaining characteristics are almost the same as those of DTMOS. Results of our investigations show that VTMOS circuits improves the power up to 50% when compared to CMOS and DTMOS circuits, in sub threshold-region..The performance characteristics of VTMOS inverter, Two-input Nand ,Two-input Nor- The Power dissipation, Propagation delay and Power delay product with the substrate b!
ias have been evaluated through simulation using H spice. The dependency of these parameters on frequency of operation has also been investigated.
Keywords: KeywordsSub-threshold ,Dynamic threshold MOS Inverter, Propagation delay ,Noise-margin ,Variable threshold MOS Inverter, Power dissipation.
EXTENSION of the file: .pdf
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