The following information was submitted:
Transactions: INTERNATIONAL JOURNAL of CIRCUITS, SYSTEMS and SIGNAL PROCESSING
Transactions ID Number: 20-602
Full Name: Rosula Reyes
Position: Doctor (Researcher)
Age: ON
Sex: Female
Address: Electronics, Computer & Communications Engineering Dept. Ateneo de Manila University, Katipunan Avenue, Loyola Heights, Quezon City
Country: PHILIPPINES
Tel: 3527329
Tel prefix: +632
Fax:
E-mail address: rsjreyes@ateneo.edu
Other E-mails:
Title of the Paper: Field Programmable Gate Array Implementation of a Motherboard for Data Communications and Networking Protocols
Authors as they appear in the Paper: Rosula Reyes,Carlos Oppus,Jose Claro Monje,Noel Patron,Raphael Gonzales,Oscar Idaño,Mark Glenn Retirado
Email addresses of all the authors: rsjreyes@ateneo.edu,coppus@ateneo.edu,jcmonje@ateneo.edu,npatron@bcdph.com,rgonzales@bcdph.com,oidano@bestinc.ph,mgretirado@bestinc.ph
Number of paper pages: 8
Abstract: Reconfigurable devices, such as the field programmable gate arrays (FPGA), have provided electrical, electronics and computer engineers with a versatile and cost-effective platform for designing circuits, developing devices and implementing electronic, communications, computer and other related systems. Presented in this paper is the use of FPGA in the development of a motherboard to introduce the concepts of data and network communications protocol through different interfaces. Some of the protocols implemented are VGA, PS/2, serial communications and parallel communications. Since the motherboard is FPGA-based, it can be reconfigured to perform other protocols making it open to a lot of possibilities.
Keywords: Communications, Data, Field programmable gate array, Motherboard, Network, Protocols, Trainers
EXTENSION of the file: .doc
Special (Invited) Session: Data and Network Communications Protocol Motherboard Using Reconfigurable Hardware
Organizer of the Session: 650-296
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